I have just assembled and tested the prototype shunt regulator for the DAC. Inpsite of long wires and veroboard it performs a little better than the LM317+CSS+diode shunt I've been using so far. When they arrive I will try replacing the transistors with some low noise BC560 types, to see if they perform better.


 

The peaks at 50Hz, 100Hz and so forth comes from the SPDIF -> I2S converter board, where the PSU has not yet been optimized.


   

TDA1545 NONOS DAC II Cadsoft eagle project files

Here's a list of things to be done before the final product is posted:

TDA1545 DAC:

  • New PCB layout
  • At least testing a better power supply, I'm thinking TL431 shunts
  • Try some BC560's in the shunt regulator.
  • Testing some bypass tricks, around 22pf from supply to ground, and the same value from Iref to ground

Active I/V:

  • Low noise BC550/BC560 transistors instead of BC547/BC557

SPDIF/I2S converter:

  • Testing a better power supply for the CS8412, again I'm thinking TL431 shunts
  • The SPDIF input circuit is bypassed, figure out why it does not work
  • Possibly a new PCB layout

uC input selector:

  • Install some bilateral switches to avoid switching the actual signal to the DAC before we know there is a signal
  • Ponder on SPDIF signal detection, do I a need to program a PLL?

I know that nothing has been posted about the uC input selector yet. Basically I'm not the least satisfied with the way I have solved the problem up until now.

A PIC16F628 switches the input relays, until a signal shows up on the DATA line of the CS8412. meaning that the actual sound is output from the DAC as well. I have decided to try measuring at the SPDIF inputs by using bilateral switches instead. I may have to lock on to the SPDIF signal to detect audio data. the solution that I'm hoping will do, is to establish the length of the pulses on the SPDIF line, if there is data, some pulses should be half the length. I'm yet uncertain as to whether the preambles will screw this up. If so I will have to detect these.

Wikipedia on SPDIF

Tonight I finished an active I/V stage for the TDA1545 DAC. Up until now I have used a resistor I/V for both my TDA1543 and TDA1545 DAC, this has some undesirable effects as the current output of the DAC should be looking into a very low value resistor, and a fairly high valued one is needed to get a deecent voltage output (http://members.chello.nl/~m.heijligers/DAChtml/Analogue/IV.html). Besides presenting a better impedance to the current output of the TDA1545, the active I/V stage also brings the output to about 2Vpp, in it's current configuration. The I/V stage was designed by "rbroer" of diyAudio, the original thread is here: Single rail, active I/V for TDA1543, TDA1545A.

The sound with the active I/V is definitely better. My test setup is a long way away from my stereo, therefore the DAC has to drive a 20 meter long cable, which has always led to a "muffled" sound. Since the active I/V has better current and voltage driving capabilities, this is now gone. This is a wonderful experiences, no magic, simple logic, that manifests itself, in the way I would have expected. Everything is firm and in control. As far as I can see this can only improve things, even when the DAC is back in place, with a half meter of cabling.

I will post a the relevant layout files, when I have finished testing and tweaking.

The TDA1545 DAC is nearing completion. I'm trying, for once, to make a nice product, somewhat operational by a simple human being. The DAC has gotten a new 5 channel input selector. This is basicly 5 SMD relays (mounted on the solderside), the CS8412 receiver, and a basic cap filtered PSU. The TDA1545 DAC board fits on top, this way, when finished, everything is firmly attached to the receiver board. I will post the PCB layout, and schematics, when the last bugs have been squashed, and the values of some components have been optimized.

Let me just say, that this is a big step for me, as it is the first of my HIFI projects in 5 years, that is actually in feature freeze, and will reach a final and generally usable state.

I have been looking for a way to simulate an inverse RIAA network in spice, After using a passive discrete simulation for a while, i found this: How to calculate RIAA correctly?

Using the ELAPLACE part in OrCAD PSpice, changing the XFORM paramter to this

(1+3180u*s)*(1+75u*s)/((1+318u*s)*(1+3.18u*s))*

And everything works like a charm.

As noted earlier, I had some trouble with C7 blowing the chips. I am no closer to being sure what the problem was, but I am beginning to suspect a bad batch of chips, anyhow the original value is according to Phlips datasheet, way to high. I have now settled for a 2.2uF WIMA cap, and everything is playing nicely.

I had some help with my troubles at diyhifi.org, the thread is here:

TDA1545 Vref cap and the death of several DAC chips

I have just finished testing a prototyping board I have designed for the PIC18F2550, that I will be using in a project I am doing for a friend. The board is designed to interface with the PICKit 2, programmer/debugger, has an on board 5 Volt regulator, and pads for a serial port through the MAX232 line driver/receiver. This is not rocket science, just a nice PIC18F2550 to breadboard converter.


 

Cadsoft Eagle project files: uc-proto.zip

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